Thin film transistors are generally used for switching devices in the liquid crystal displays. Among the thin film transistors, the POLY-TFT has relatively smaller size but faster operation speed, compared to the conventional amorphous silicon thin film transistors(a-Si-TFT).
When the POLY-TFT is applied to the liquid crystal display, it is possible to obtain thin and small modules. Further, a means for switching at an array substrate and a drive IC at a printed circuit board can be formed simultaneously thereby reducing manufacturing costs.
Herein, a top gate method that a gate electrode is laid on an upper portion of a channel layer is frequently used in the conventional POLY-TFTs. However, the POLY-TFT according to the top gate method requires a number of masking processes.
Accordingly, there has been suggested a bottom gate method that requires less masking processes than the conventional top gate method.
As shown in FIG. 1, a buffer layer(not shown) is formed on a glass substrate 1 and a metal layer is deposited on the glass substrate 1. The metal layer is patterned in some portions thereof thereby forming a gate electrode 2. A gate insulating layer 3 is deposited on the entire glass substrate 1 in which the gate electrode 2 is formed. A polysilicon layer is deposited on the entire gate insulating layer 3 and patterned to cover the gate electrode 2 thereby forming a channel layer 4. An insulating layer is deposited on the channel layer 4 and the gate insulating layer 3. Thereafter, the insulating layer is patterned according to a back-exposing method thereby forming an ion stopper 6. A source region 5a and a drain region 5b are formed at both sides of the ion stopper 6 by implanting impurity ions into the channel layer 4.
Another metal layer is deposited on the resultant, and some portions of the metal layer is patterned to be contact with the source and drain regions 5a,5b thereby forming a source electrode 7a and a drain electrode 7b.
The POLY-TFT according to the bottom gate method does not require any masking process for forming the ion stopper 6. Therefore, one masking step may be reduced, compared to the conventional top gate method requiring the masking step for producing the ion stopper 6.
However, a relatively high drain electric field is maintained even in the off-state, since a distance between the source region 5a and the drain region 5b of the POLY-TFT according to the bottom gate method is very small. Therefore, a large quantity of leakage current is generated in the off-state.